A Low Power Linear Phase Digital FIR Filter for Wearable ECG Devices.
← Research streamThe paper presents a low-power linear phase digital FIR filter as part of an ECG-on-Chip intended for wearable use. The proposed filter structure reduces arithmetic operations per sample and thereby lowers power consumption, using an interpolated finite impul…
Study snapshot
Abstract
In this paper we present a low power linear phase digital FIR filter which is a part of an ECG-on-Chip. The ECG-on-Chip can be embedded into clothing to acquire the electrocardiogram (ECG) signal and send a warning message to a mobile phone or PDA if an abnormal ECG is detected. The proposed new filter structure significantly reduces the arithmetic operations for each sample which in turn lowers the power consumption. The filter is developed based on the interpolated finite impulse filter technique and is very attractive for a low cost and low power VLSI implementation.
AI evidence extraction
Structured fields below were generated from the paper’s abstract and metadata to make the evidence easier to inspect. Automated extraction may be incomplete or incorrect; verify important details against the original paper.
Main findings
The paper presents a low-power linear phase digital FIR filter as part of an ECG-on-Chip intended for wearable use. The proposed filter structure reduces arithmetic operations per sample and thereby lowers power consumption, using an interpolated finite impulse filter technique.
Outcomes measured
- Low-power linear phase digital FIR filter design for wearable ECG-on-Chip
- Reduced arithmetic operations per sample
- Lowered power consumption
- VLSI implementation suitability
View raw extracted JSON
{
"study_type": "engineering",
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"outcomes": [
"Low-power linear phase digital FIR filter design for wearable ECG-on-Chip",
"Reduced arithmetic operations per sample",
"Lowered power consumption",
"VLSI implementation suitability"
],
"main_findings": "The paper presents a low-power linear phase digital FIR filter as part of an ECG-on-Chip intended for wearable use. The proposed filter structure reduces arithmetic operations per sample and thereby lowers power consumption, using an interpolated finite impulse filter technique.",
"effect_direction": "unclear",
"limitations": [],
"evidence_strength": "insufficient",
"confidence": 0.74,
"peer_reviewed_likely": "unknown",
"keywords": [
"wearable ECG",
"ECG-on-Chip",
"digital FIR filter",
"linear phase",
"low power",
"interpolated finite impulse response",
"VLSI",
"mobile phone",
"PDA"
],
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}AI-extracted fields are generated from the abstract and metadata and may be incomplete or incorrect. This material is for informational purposes and is not medical advice.
Identifiers and source
DOI: 10.1109/iembs.2005.1616211
PubMed: 17281980